What Is the Logic Gate Calculator?
This logic gate calculator determines the output of any logic gate for the input signals you choose, and generates the complete truth table that goes with it. Feed it a single gate — AND, OR, NOT, NAND, NOR, XOR, XNOR or a buffer, with up to eight inputs — or type a whole Boolean expression such as (A AND B) OR NOT C and it will build the circuit, evaluate every row, and tell you what the combination adds up to.
Whether you are a DIY person or an expert in electronics, logic gates are the most basic thing you should be acquainted with. Everything below is generated from your own inputs: the gate symbol, the Boolean expression, the truth table, the canonical forms, how many chips the circuit needs and how fast it can run.
Symbols and notation are shown in the standard you pick:
- American (ANSI/IEEE Std 91-1984) — the distinctive shapes everyone recognises: the D-shape for AND, the shield for OR, the triangle for a buffer, a small bubble for negation. AND is written
A · B, OR isA + B, and the complement is an overbar. - International (IEC 60617-12, notation per ISO 80000-2) — rectangular symbols with a qualifying sign inside the box:
&for AND,≥1for OR,=1for XOR,1for a buffer. AND is writtenA ∧ B, OR isA ∨ B, and the complement is¬A.
Both describe exactly the same electronics. The difference is which drawing convention your schematic, textbook or country uses — American engineering drawings almost always use the distinctive shapes, while European and international standards use the rectangles.
What Is a Logic Gate?
A logic gate is a digital circuit that acts as a gate (or switch) for the flow of information — an electric signal. It either allows or stops signals, depending on whether certain logical conditions are satisfied or not.
A logic gate can have one or more inputs, through which it accepts digital signals. The output signal depends on whether the input signals are on/high (1) or off/low (0), and on the type of logical operation the gate performs.
Logic gates are the basic building block of every digital system, including your computer. You will find them in almost every electronic circuit: microprocessors, microcontrollers, alarms, streetlights, washing machines and traffic controllers.
What Are the Basic Logic Gates?
There are three basic logic gates. Everything else is built from them.
AND gate
The AND gate gives a high (1) output only when all of its inputs are high (1). The Boolean expression is A · B = Output, where the multiplication sign (·) means AND in Boolean algebra. Written the international way, it is A ∧ B.
OR gate
The OR gate gives a high (1) output when either of its inputs is high (1). The Boolean expression is A + B = Output, where the addition sign (+) means OR in Boolean algebra. Written the international way, it is A ∨ B.
NOT gate
The NOT gate inverts the input: if the input is high (1) the output is low (0), and vice versa. It is a single-input, single-output device, which is why it is also called an inverter. The Boolean expression puts a bar over the variable — A with an overbar — or, internationally, ¬A.
Combination of Basic Logic Gates
We can combine the basic gates (AND, OR and NOT) to get many more useful gates. A few popular combinations are:
NAND gate
A NAND (NOT-AND) gate is an AND gate followed by a NOT gate: the output is low (0) only when all of its inputs are high (1). In Boolean algebra it is A · B with a bar over the whole product.
NOR gate
A NOR (NOT-OR) gate is an OR gate followed by a NOT gate: the output is high (1) only when both of its inputs are low (0). In Boolean algebra it is A + B with a bar over the whole sum.
XOR gate
The XOR (exclusive OR) gate gives a high (1) output when its inputs are different — one high and one low. With more than two inputs the rule generalises: the output is 1 when an odd number of inputs is 1. Its symbol is A ⊕ B. XOR is the heart of every binary adder and of parity checking.
XNOR gate
The XNOR (exclusive NOR) gate is an XOR followed by a NOT: the output is high (1) when the inputs are the same. It is the digital equality test, which is why comparators are built from XNOR gates.
NAND and NOR are universal
Any Boolean function whatsoever can be built using nothing but NAND gates, or nothing but NOR gates. That is why the humble 7400 quad NAND is the most produced logic chip in history — one part number can implement any circuit you like.
Logic Gates Truth Tables
A truth table lists every possible combination of inputs together with the output the gate produces. A gate with n inputs has 2n rows: 4 rows for two inputs, 8 for three, 256 for eight.
The two-input basics look like this:
| A | B | AND | OR | NAND | NOR | XOR | XNOR |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |
And the single-input ones: a NOT gate turns 0 into 1 and 1 into 0, while a buffer leaves the value alone and simply restores the signal.
How to Generate a Logic Gates Truth Table Using This Calculator
- Pick the symbol standard — American distinctive shapes or international rectangles. It changes the drawn symbol and the way the algebra is written, not the result.
- Choose what to analyse: a single logic gate, or a Boolean expression if you want a combination of several gates.
- For a single gate, select the gate and the number of inputs (2 to 8; NOT and the buffer always have one).
- For an expression, type it with variables A to H. You can write the operators as words (
AND,OR,NOT,NAND,NOR,XOR,XNOR) or as symbols (·*&for AND,+|for OR,!~or a trailing apostrophe for NOT,^for XOR). Juxtaposition works too:ABmeans A AND B, exactly as in a textbook. - Set the input signals to the 0/1 combination you are interested in. That row is highlighted in the truth table, and its output is shown at the top of the results.
- Optionally choose a logic family and the price of one IC to get the chip count, the propagation delay and the cost of building the circuit.
You get the gate symbol, the Boolean expression in your chosen notation, the full truth table, the canonical sum-of-products and product-of-sums, the minterm and maxterm lists, the output column as a binary/hex/decimal word, every basic gate evaluated on the same inputs, and a parts list with the propagation delay and cost.
Worked Example: (A AND B) OR NOT C
Three variables mean 2³ = 8 rows. The expression is 1 whenever C is low, or whenever both A and B are high:
| Row | A | B | C | A · B | C̄ | Y |
|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| 1 | 0 | 0 | 1 | 0 | 0 | 0 |
| 2 | 0 | 1 | 0 | 0 | 1 | 1 |
| 3 | 0 | 1 | 1 | 0 | 0 | 0 |
| 4 | 1 | 0 | 0 | 0 | 1 | 1 |
| 5 | 1 | 0 | 1 | 0 | 0 | 0 |
| 6 | 1 | 1 | 0 | 1 | 1 | 1 |
| 7 | 1 | 1 | 1 | 1 | 0 | 1 |
The minterms are Σm(0, 2, 4, 6, 7) and the maxterms are ΠM(1, 3, 5). Building it takes three two-input gates — one AND, one NOT and one OR — which is one 74HC08, one 74HC04 and one 74HC32, three chips at roughly $0.45 each. The signal passes two gate levels, so at 9 ns per gate the output settles about 18 ns after the inputs change.
Building the Circuit From Real Chips
The calculator counts gates in two-input equivalents, the way you would actually wire them: an n-input gate is built from n−1 two-input gates, so a 3-input NAND is one AND feeding one NAND. It then works out how many packages you need, because logic ICs come several gates to a chip:
- 7408 — quad 2-input AND (4 gates)
- 7432 — quad 2-input OR (4 gates)
- 7404 — hex inverter (6 gates)
- 7400 — quad 2-input NAND (4 gates)
- 7402 — quad 2-input NOR (4 gates)
- 7486 — quad 2-input XOR (4 gates)
- 74266 — quad 2-input XNOR (4 gates)
The same functions exist in the CD4000B series: CD4081B, CD4071B, CD4069UB, CD4011B, CD4001B, CD4070B and CD4077B. Pick the family you are actually buying — it sets both the typical propagation delay and the default price, and you can overwrite the price with what your supplier charges in your own currency.
FAQs
What is the difference between the American and the international gate symbols?
Nothing electrical — only the drawing convention. The American standard (ANSI/IEEE Std 91) uses distinctive outlines you can recognise at a glance, and writes Boolean algebra as A · B, A + B and an overbar. The international standard (IEC 60617-12) uses one rectangle for every gate with a qualifying symbol inside — &, ≥1, =1 — and the mathematical notation ∧, ∨, ¬ from ISO 80000-2. Switch the selector to see the same circuit drawn both ways.
How many rows will my truth table have?
Two to the power of the number of variables. Eight variables give 256 rows, which is why tables longer than 64 rows are shown abridged — the calculation itself always covers every row.
What is a minterm and what is a maxterm?
A minterm is a row where the output is 1, written as a product of all the variables (complemented where the input is 0). A maxterm is a row where the output is 0, written as a sum. Adding all the minterms gives the canonical sum of products; multiplying all the maxterms gives the canonical product of sums. Both describe exactly the same function.
What is the hexadecimal number next to the truth table?
It is the output column read as a single binary word, with row 0 as the least significant bit. It is a compact fingerprint of the function and the exact value an FPGA lookup table would be loaded with: a two-input AND is 8, OR is E, XOR is 6, NAND is 7.
Is the propagation delay realistic?
It is a first-order estimate: the number of gate levels along the longest path multiplied by the typical delay of one gate in the family you chose, at 5 V and room temperature. A real board is also limited by wiring capacitance, fan-out, supply voltage and temperature, and any sequential circuit must also respect setup and hold times. Use it to compare families and circuit depths, not as a datasheet guarantee.
Why does my expression say it is equivalent to a single gate?
Because it is. If the output column of your combination matches a standard gate on the same inputs, the calculator says so — that is how you discover that NOT(A) OR NOT(B) is simply a NAND gate, which is De Morgan's law in action.
Can I use more than two inputs on a NAND or NOR?
Yes, up to eight. Note that a multi-input NAND means "NOT (all inputs high)" — a single gate — while chaining two-input NANDs (A NAND B NAND C) is a different function, because NAND is not associative. The calculator treats the single-gate mode as a genuine n-input gate and keeps typed chains strictly left to right.
What does a buffer do if it changes nothing?
It changes nothing logically, but plenty electrically: it restores a degraded signal, isolates one part of a circuit from another, and provides the drive current to feed many inputs from one output. That is also why the delay of a buffer still counts in the total.